A Branch Instruction Processor for SCISM Organizations

The performance degradation caused by branch instructions in pipelined computers is well known. The degradation is even greater on computers with multiple pipelines processing a single instruction stream, such as superscalar and scalable compound instruction-set machines (SCISM). Several branch prediction schemes have been proposed that attempt to reduce this performance penalty. One of these { dynamic prediction of branch outcomes by tagging instructions in an instruction cache with prediction information { is adapted to an IBM ESA/370 SCISM implementation with several important additions. The adaptation may be extended to other architectures with similar characteristics. More signiicantly, a scheme is developed that allows the predominant IBM ESA/370 branch instructions to be removed from the instruction stream. These instructions, in eeect, execute in zero time when the prediction is correct, thereby signiicantly increasing the performance achieved by the base SCISM machine organization.